A 3D electronic module comprises a stack of electronic slices. A slice 5, an example of which is shown in FIG. 1, generally comprises one or more active 1c, 1b, or passive 1a components which have electrical connection elements 2c, 2b or 2a running over one of the faces 51 of the slice, the components being clad with an electrically insulating resin 6. One or more electrically conductive tracks 7 situated on the same face 51 connect these components to each other or connect them to electrical connection elements of slices between them or to connection elements of the slice to an interconnecting circuit.
It is known to electrically connect the slices to each other by conductors situated on the lateral faces of the stack, that is to say on the edges 52 of the slices.
This results in a great length of electrical connection for connecting two components, notably when they are respectively situated at the center of two slices. The longer the connection becomes, the longer the connection time increases, which globally reduces the performance of the 3D module.
Moreover, the number of conductors situated on the lateral faces is limited by the area of these faces considering, in particular, the necessary pitch. This limit to the number of conductors accordingly limits the number of routable signals.
Another solution exists for connecting a first chip, provided with connection pads and situated on the lower face of a first slice, with a second chip, also provided with connection pads and situated opposite the first chip, on the upper face of a second slice situated below the first one: the pads of the first chip comprise pointed protrusions. For both chips, the aluminum pads, of thickness approximately 0.2 μm, are conventionally covered with a very hard layer of natural aluminum oxidation of a few tens of Angstroms. The thickness of the protrusions of the first chip is approximately 30 μm. In order to connect the two chips, they are superimposed and then compressed such that the protrusions of one of them embed in the pad of the other. This solution makes it possible to reduce the connection length and makes it possible to avoid the limit on the number of routable signals but the number of slices of the module is intrinsically limited to two. This solution has another disadvantage. In order that the electrical connection may be produced, the pressure must be sufficient for the protrusions to traverse the very hard oxidation layer. In certain cases, considering the slight thickness of the pad, the pressure produces a crack in the chip.
Another solution exists which relates to the particular case of a stack of chips which, furthermore, are specific chips. Each chip comprises, on one face, a male connector, in this instance a protrusion with a hard point and, one the other face, a traversing electrode which constitutes a female connector. The protrusion and the electrode are formed from the silicon which constitutes the chip. When the chips are superimposed in order to produce the module, the protrusion of one chip embeds in the electrode of the other chip in such a way as to obtain the electrical connection. This connection is obtained only at the cost of extreme positioning precision. Moreover, the module obtained is expensive to produce because of the high cost of each chip, which is specific, and it cannot be produced with commercial chips or with passive components.